IJAEEE - Journal Papers

Design Of Power And Area Efficient Approximate Multipliers

Authors :  SABITHASHINI . S , Dr. B. SYED MOINUDDIN BOKHARI | Pages : 19 - 25

Implementations Of Test Pattern Design Using Cyclic Redundancy Check

Authors :  ARUNMOZHI.A , Dr.V.SARASWATHI | Pages : 13 - 18

Image Cryptography Design Using Nano Aes Algorithm

Authors :   S.JAYAPRIYA , R.RAJINI VISHWANITHA | Pages : 7 - 12

An Efficient Vlsi Implementation Of Edge Detection

Authors :  S. THAMIZHELAKKIYA , R. RAJINI VISWANITHA , S. LILLYPET | Pages : 1 - 6